UVM Verification Team Lead

We are working closely with a world-class semiconductor company who specialise in the vision, communications and audio markets.

They have an exciting new opening for experienced Verification Team Lead to join their ranks and manage a small, world-class team of engineers in their Cork office

They are looking for the best talent on the market to help with the growth of their company.

What they are looking for:

* Experience in leading an UVM team
* 8-10+ years' experience of the design and/or verification of RTL (Verilog)
* Experience leading or mentoring a small team
* Advanced knowledge of SystemVerilog and Constrained Random simulation
* Experience of using UVM
* Strong knowledge of the features of the UVM library
* Experience of designing and implementing UVM derived testbenches
* Strong knowledge of object oriented programming features
* Use of digital simulation tools such as Cadence IES/XCelium or Synopsis VCS
* Use of code coverage tools such as IMC
* Good debug skills

The following skills are considered as a plus:

* Knowledge in Wi-Fi
* Knowledge in Wireless communication systems

My client are offering market leading salary and benefits which include private healthcare, bonus, pension, remote working and RSU

If you would like to know more about this position, please apply via the link below or contact Graeme King at Reperio Human Capital on 01 571 3000.

Reperio Human Capital acts as an Employment Agency and an Employment Business.

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