Senior C++ / System C Modelling Engineer with 2-3+yrs experience coding in C++ or System C required for permanent role with dynamic company in Dublin city centre.
This position will involve the development of high-speed simulation models that accurately reflect the intended hardware design. You will work closely with the architecture and design teams to understand the functional & performance goals of the design, and develop accurate block-level models in C++/SystemC.
• Proficiency in object-oriented design using C++, with demonstrable usage of STL.
• Min 2-3 years’ experience coding in C++ or SystemC, in a unix environment, ideally with a focus on hardware modelling.
• Experience validating C++ code/models
• Experience debugging and optimizing C++ code for speed, with usage of tools such as Valgrind, gdb, gprof, etc.
• Understanding of microprocessors, SoC architectures, standard bus protocols (AXI, AHB, etc).
• Strong unix skills, with shell scripting experience, and usage of Python or Perl
• Strong English-language communications skills, both orally and written.
• Knowledge of HDL languages (Verilog, System Verilog, VHDL) and RTL design methodology
• Hands-on experience (or a desire to get it) integrating and debugging C++ models in a mixed-language HDL simulation environment, such as VCS.
• Experience with transaction-level modelling (TLM) for virtual platforms of SoCs, with an understanding of the different TLM coding styles
Please contact Emer Moore to discuss in confidence